NCP1611
http://onsemi.com
7
DETAILED PIN DESCRIPTION
Pin Number
Name
Function
1
V
CONTROL
The error amplifier output is available on this pin. The network connected between this pin and
ground adjusts the regulation loop bandwidth that is typically set below 20 Hz to achieve high
Power Factor ratios.
Pin1 is grounded when the circuit is off so that when it starts operation, the power increases
slowly to provide a softstart function.
2
V
SENSE
A portion of the instantaneous input voltage is to be applied to pin 2 in order to detect
brownout conditions. If V
pin2
 is lower than 0.9 V for more than 50 ms, the circuit stops pulsing
until the pin voltage rises again and exceeds 1.0 V.
This pin also detects the line range. By default, the circuit operates the lowline gain mode. If
V
pin2
 exceeds 2.2 V, the circuit detects a highline condition and reduces the loop gain by 3.
Conversely, if the pin voltage remains lower than 1.7 V for more than 25 ms, the lowline gain
is set.
Connecting the pin 2 to ground disables the part once the 50 ms blanking time has elapsed.
3
FF
CONTROL
This pin sources a current representative to the line current. Connect a resistor between pin3
and ground to generate a voltage representative of the line current. When this voltage exceeds
the internal 2.5 V reference (V
REF
), the circuit operates in critical conduction mode. If the pin
voltage is below 2.5 V, a deadtime is generated that approximately equates
[66 ms x (1  (V
pin3
/V
REF
))]. By this means, the circuit forces a longer deadtime when the
current is small and a shorter one as the current increases.
The circuit skips cycles whenever V
pin3
 is below 0.65 V to prevent the PFC stage from
operating near the line zero crossing where the power transfer is particularly inefficient. This
does result in a slightly increased distortion of the current. If superior power factor is required,
offset pin 3 by more than 0.75 V offset to inhibit the skip function.
4
CS / ZCD
This pin monitors the MOSFET current to limit its maximum current.
This pin is also connected to an internal comparator for Zero Current Detection (ZCD). This
comparator is designed to monitor a signal from an auxiliary winding and to detect the core
reset when this voltage drops to zero. The auxiliary winding voltage is to be applied through a
diode to avoid altering the current sense information for the ontime (see application
schematic).
5
Ground
Connect this pin to the PFC stage ground.
6
Drive
The highcurrent capability of the totem pole gate drive (0.5/+0.8 A) makes it suitable to
effectively drive high gate charge power MOSFETs.
7
V
CC
This pin is the positive supply of the IC. The circuit starts to operate when V
CC
 exceeds 10.5 V
(A version, 17.0 V for the B version) and turns off when V
CC
 goes below 9.0 V (typical values).
After startup, the operating range is 9.5 V up to 35 V. The A version is preferred in
applications where the circuit is fed by an external power source (from an auxiliary power
supply or from a downstream converter). Its maximum startup level (11.25 V) is set low
enough so that the circuit can be powered from a 12 V rail. The B version is optimized for
applications where the PFC stage is selfpowered.
8
Feedback
This pin receives a portion of the PFC output voltage for the regulation and the Dynamic
Response Enhancer (DRE) that drastically speedsup the loop response when the output
voltage drops below 95.5% of the desired output level.
V
pin8
 is also the input signal for the (nonlatching) OverVoltage (OVP) and UnderVoltage
(UVP) comparators. The UVP comparator prevents operation as long as V
pin8
 is lower than
12% of the reference voltage (V
REF
). A soft OVP comparator gradually reduces the dutyratio
when V
pin8
 exceeds 105% of V
REF
. If despite of this, the output voltage still increases, the
driver is immediately disabled if the output voltage exceeds 107% of the desired level (fast
OVP).
A 250 nA sink current is builtin to trigger the UVP protection and disable the part if the
feedback pin is accidentally open.
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